1. Field of the Invention
The present invention relates to a direct conversion receiver, and more particularly to a direct conversion receiver known as a zero intermediate frequency (IF) receiver, for use in a portable telephone or other radio terminal devices.
2. Description of the Related Art
Recently, there have been rising the demands for downsizing, power consumption reduction, and cost reduction of a radio according to the prevalence of a portable telephone and other radio portable terminals. As a radio receiving method for realizing such demands, a direct conversion is an attractive architecture in radio design.
FIG. 9 shows a block diagram of the typical direct conversion receiver of this kind. With reference to FIG. 9, radio frequency signals are respectively supplied to quadrature mixers 73a and 73b through an antenna 71 and a radio frequency amplifier 72. One is multiplied by a local oscillation frequency of a local oscillator 74 in the mixer 73a, and the other is multiplied by the quadrature component of the local oscillation frequency in the mixer 73b, then to be supplied as I-component and Q-component. The quadrature component of the local oscillation frequency of the local oscillator 74 is generated by a 90 degrees phase shifter 75. The respective output signals of the mixers 73a and 73b consist of the sum component of input carrier frequency and local oscillation frequency and the difference component relative to the zero frequency (in case of .+-. expression of spectrum). LPFs 76a and 76b extract only the difference component with the zero frequency fixed as a reference (hereinafter, referred to as a zero frequency component). The extracted zero frequency component is further processed and demodulated by respective baseband amplifiers 77a and 77b.
The above-mentioned direct conversion method directly converts the input frequency into the baseband frequency. This corresponds to the case where the intermediate frequency is zero in the superheterodyne method. Because no image frequency component exists, no radio frequency filter is required. The baseband signal has such a form as turning back at the zero frequency and a LPF may be used as a channel filter. This makes IC fabrication easier compared with a channel filter of BPF type for use in the superheterodyne method. The direct conversion method has been recently recognized as a suitable circuit for 1 chip receiver because of requiring fewer external parts and making LSI fabrication easier compared with the superheterodyne method.
However, in order to use a direct conversion receiver in a radio system such as a portable telephone, it is necessary to eliminate dc (direct-current) offset voltage generally existing on the order of several mV to several 10 mV in a mixer, which is a serious practical problem. In order to get a good sensitivity in PDC (Personal Digital Cellular-phone) system and PHS (Personal Handy-phone System), the amplification degree of the baseband amplifiers 77a and 77b must be set at an extremely high value, for example, at several 10 dB. The baseband amplifiers, however, are saturated with the dc offset voltage occurring in the mixer as mentioned above, and never function as a receiver.
In order to solve the above problem, placing dc blocking condensers 78a and 78b behind the mixers 73a and 73b may be considered as illustrated in FIG. 10. This method, however, also blocks the zero frequency component and therefore this method can be applied only to the FSK modulation, for example, for use in a pager system. Even in this case, another additional circuit for shortening the charge/discharge time of a capacitor is generally needed, thereby increasing the circuit size disadvantageously, since a pager with an intermittent receiving function is generally designed in order to extend a battery life.
Another conventional technique for eliminating dc offset voltage is disclosed in, for example, Japanese Patent Publication Laid-Open (Kokai) No. Heisei 3-220823, "Direct Conversion Receiver". The same publication describes a method of eliminating dc offset voltage by a negative feedback loop using AD and DA converters as illustrated in FIG. 11. In the block diagram of FIG. 11, the same reference numerals are respectively attached to the same components as those of the block diagram of FIG. 9.
In a direct conversion receiver as shown in FIG. 11, dc offset voltage is extracted from the output signals of the baseband amplifiers 77a and 77b by use of the AD converters 81a and 81b, and according to the extracted result, the dc offset voltage is suppressed by use of a data processing circuit 82 and DA converters 83a and 83b that are closed-loop controlling means.
This method is applicable to .pi./4QPSK modulation for use in PDC and PHS because of blocking off none of the zero frequency component in signal information. However, this method, by use of a closed-loop, is not effective in the change of offset voltage at the earlier time because of the restriction of the loop convergence time. More specifically, in case of controlling the average value of the offset voltage, for example, to be zero during a long period of one second, some effects can be expected to an extent. However, it is not effective in the offset voltage such as would vary at a speed of time slot of the digital portable telephone system (for example, 0.625 msec in PHS). Further, it is defective in increasing the circuit size because of using AD and DA converters.